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keil, startup
2008年05月21日 星期三 14:33

Many new microcontrollers have been developed in the past few years. Some of these devices require special startup code in order to properly initialize all on-chip peripherals and memory.

QUESTION

I've compiled and linked my 8051 program. I noticed that there is some startup code and variable initialization code that's included in my program. Where did it come from?

ANSWER

The startup code is stored in the STARTUP.A51 file (found in the \C51\LIB directory).

The initialization code is stored in the INIT.A51 file (also found in the \C51\LIB directory).

These 2 files are executed before your main C function. Immediately after RESET, STARTUP is executed. STARTUP calls INIT which initializes your programs global variables. INIT then calls the main C function.

These 2 files are assembled and included in the Keil C library. If you do not copy and modify the STARTUP and INIT files and include them in your project, the linker automatically includes the default ones from the library

QUESTION

I'm creating a project that is made up of C and assembly files. Do I need to use the STARTUP.A51 file that you provide, or can I use my own version?

ANSWER

We strongly urge you to use the STARTUP.A51 file that we provide as the basis for your startup routines. The Keil startup code performs the following operations:

  • Clears DATA and optionally PDATA and XDATA memory,
  • Sets up the reentrant stacks (if necessary)),
  • Initializes C Global Variables (see INIT.A51),
  • Sets the Stack Pointer (SP),
  • Jumps to your MAIN C function.

Your startup code must do all of these. If it doesn't, you may encounter run-time problems that are difficult to debug and diagnose.

Note that if you do include some form of a startup file, Keil will automatically include a start up file that is in the Keil library.

SYMPTOMS

Some users have reported problems using the on-chip SRAM of the Dallas DS89C420, DS89C430, or DS89C450 devices. The memory appears to be disabled.

CAUSE

The on-chip SRAM is disabled after CPU reset and needs to be enabled. By default the devices accesses only external XDATA memory.

RESOLUTION

The on-chip XDATA SRAM of the Dallas devices behaves like off-chip XDATA. So, in your program, variables that are located in XDATA will be stored in the on-chip SRAM.

There are several steps you must follow to use the on-chip XRAM.

  1. µVision2 must know to place variables in the on-chip SRAM (XRAM) memory. To do that, in µVision2 you must:
    • Select the correct device for your project (from the device database)
    • Enable Use on-chip ROM and Use on-chip XRAM from the Project-Options for Target-Target dialog.
  2. The on-chip SRAM must be enabled before you use it. You must do this in the startup code (so that the XRAM is on when global variables are initialized).

Add STARTUP.A51 to your project. To do this, copy the file \C51\LIB\STARTUP.A51 to your project folder and add it to the project. Then, in the STARTUP.A51 file, enable the on-chip SRAM by setting bit 0 (DME0) in the PMR SFR. The following lines in STARTUP.A51 will do this:

RSEG ?C_C51STARTUP

PMR DATA  0C4H                 ; add SFR definition

STARTUP1:
                               ; enable on-chip xdata RAM
          ORL PMR,#1           ; PMR.DME0 = 1 (set to 1 to enable SRAM)
 

SYMPTOMS

Some users have reported problems using the on-chip XRAM of the Philips 80C66x and 80C51Rx devices. The memory appears to be disabled.

CAUSE

We have observed that by default, the Philips devices do not enable on-chip XRAM. This is contrary to the datasheets which, in several places, contain incorrect reset values for the AUXR register.

RESOLUTION

The on-chip XDATA RAM (XRAM) of the Philips 80C66x and 80C51Rx behaves like off-chip XDATA. So, in your program, variables that are located in XDATA will be stored in the on-chip XRAM.

There are several steps you must follow to use the on-chip XRAM.

  1. µVision2 must know to place variables in the on-chip XRAM memory. To do that, in µVision2 you must:
    • Select the correct device for your project (from the device database)
    • Enable Use on-chip ROM and Use on-chip XRAM from the Project-Options for Target-Target dialog.
  2. The on-chip XRAM must be enabled before you use it. You must do this in the startup code (so that the XRAM is on when global variables are initialized).

Add STARTUP.A51 to your project. To do this, copy the file \C51\LIB\STARTUP.A51 to your project folder and add it to the project. Then, in the STARTUP.A51 file, enable the on-chip XRAM by clearing bit 1 in the AUXR1 SFR. The following lines in STARTUP.A51 will do this:

RSEG ?C_C51STARTUP

AUXR1 DATA  08EH               ; add SFR definition

STARTUP1:
                               ; enable on-chip xdata RAM
          ANL AUXR1,#NOT 02H   ; AUXR1/Bit 1 (clear to 0 to enable on-chip XRAM)

QUESTION

I'm using a chip with on-chip XDATA memory. I want to use one 256-byte page as PDATA. How do I do that?

Does the upper address byte come from P2?

ANSWER

Accessing a 256-byte page (PDATA) of on-chip XDATA is possible and often desirable since PDATA is more efficient than XDATA.

When On-chip XDATA is Enabled...

  • Most devices allow PDATA access (MOVX @Rx) to only the first 256 bytes of XDATA (0x0000-0x00FF). On such devices, there is nothing to configure. You don't need to enable the PPAGEENABLE setting in the startup code since the PPAGE is fixed by the chip to 0.
  • Some devices have a special SFR that contains the upper address byte to use for PDATA accesses. Devices like the Infineon C517A have an SFR called XPAGE at address 0x91. In the startup code, you must set this SFR to the page number for PDATA. We recommend you use the first available memory page for the PDATA space (0xF8 in the case of the Infineon device).
To configure the tools for PDATA access, you must...
  • Copy the startup code to your project directory, modify it for PDATA access, and add it to the project.
  • In the startup code, you must set PPAGEENABLE EQU 1, PPAGE EQU 0F8h and PPAGE_SFR DATA 091h. This configuration reflects the Infineon C517A hardware. It will be different depending on the chip you use.
  • In the BL51 Linker options, you must specify the starting address for the PDATA memory. For the Infineon C517A device this value is 0xF800. Enter 0xF800 under Options for Target — BL51 Locate — Pdata:
  • In the Lx51 Linker options, you must specify the range of PDATA memory. Options for Target — LX51 Locate — User Class: PDATA(X:0xF800-X:0xF8FF)

When On-chip XDATA is Disabled...

Most 8051 devices use the value of Port 2 as the upper address byte for PDATA accesses. With such a configuration, the required startup code settings are nearly identical to the above except that the PPAGE SFR must be specified as PPAGE_SFR DATA 0A0H.


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